Design and implementation of multichannel bandpass filter for embedded system

Digital bandpass filters are widely used in the field of signal processing. A lot of implementations can be found in the literature, either by software or hardware solutions. The proposed design will use many IIR-biquads in serial and parallel form to construct a multichannel bandpass filter; each biquad contains a very small processor inside. The advantages of this modulized arrangement are simple but flexible, expandable and cost-effective. In the VLSI implementation, the hardware complexity of the filter is directly proportional to the number of orders and the bit-width of input signal and the coefficients. To reduce the hardware cost, this can be solved with iteration calculations by software; therefore, a co-design of hardware and software may produce cost-efficient IIR filters. The key design concept is to build a processor for software processing with minimum hardware resources, without sacrificing the performance of the original IIR filter. The proposed design architecture can be used for embedded systems in system-on-chip (SOC) environments easily.