A wide pull-in range fast acquisition hardware-sharing two-fold carrier recovery loop

Author

Ching-Chi Chang ; Lin, Chieiz-Chih ; Shiue, Muh-Tian ; Chorng-Kuang Wang

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

4

fYear

2001

fDate

6-9 May 2001

Firstpage

358

Abstract

This paper proposes a two-fold carrier recovery loop that possesses ±25000-ppm pull-in range and 7-ms acquisition time for 64-QAM blind adaptive system. The carrier recovery system contains a prior wide-band loop to acquire a coarse carrier frequency and a posterior narrow-band loop to achieve -82 dBc jitter suppression. It can be applied to a 4.035-MHz low-IF cable modem system with the ±100-kHz frequency offset tolerance requirement. The two-fold carrier recovery loop operates in consecutive three stages, which are Costas carrier phase estimation, DDML carrier phase estimation, and DD-MMSE carrier phase estimation. The proposed architecture is hardware efficient since the three-staged operation shares most of the circuit functions

Keywords

modems; quadrature amplitude modulation; 4.035 MHz; 64-QAM blind adaptive system; Costas carrier phase estimation; DD-MMSE carrier phase estimation; DDML carrier phase estimation; acquisition time; cable modem system; frequency offset tolerance; hardware architecture; hardware-sharing two-fold carrier recovery loop; jitter suppression; posterior narrow-band loop; prior wide-band loop; pull-in range; Cable TV; Chromium; Circuits; Frequency; Hardware; Jitter; Modems; Phase estimation; Phase locked loops; Wideband;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.922247

Filename

922247