DocumentCode :
3090593
Title :
A Test Data Compression Method for System-on-a-Chip
Author :
Feng, Jianhua ; Li, Guoliang
Author_Institution :
Peking Univ., Beijing
fYear :
2008
fDate :
23-25 Jan. 2008
Firstpage :
270
Lastpage :
273
Abstract :
This paper presents a novel and efficient code, named MFDR (modified frequency-directed run-length) , for test data compression. The proposed code is a class of variable-to-variable-length prefix code. Both theoretical analysis and experimental results indicate that when the probability of 0s in the test set is greater than 0.8565, it can acquire better compression efficiency than FDR code, and compared to hybrid run-length code, the point is 0.8794.
Keywords :
data compression; logic testing; runlength codes; system-on-chip; variable length codes; MFDR code; hybrid run-length code; modified frequency-directed run-length code; runlength codes; system-on-a-chip; test data compression method; variable-to-variable-length prefix code; Automatic testing; Built-in self-test; Circuit testing; Decoding; Frequency; System testing; System-on-a-chip; Tail; Tellurium; Test data compression; FDR code; Hybrid Run-length code; MFDR code; Test data compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Design, Test and Applications, 2008. DELTA 2008. 4th IEEE International Symposium on
Conference_Location :
Hong Kong
Print_ISBN :
978-0-7695-3110-6
Type :
conf
DOI :
10.1109/DELTA.2008.30
Filename :
4459555
Link To Document :
بازگشت