DocumentCode :
3090748
Title :
Cache Performance and Efficiency Factors of Parallel Data Structures
Author :
Dudas, Alan ; Sandor, Juhasz
Author_Institution :
Dept. of Autom. & Appl. Inf., Budapest Univ. of Technol. & Econ., Budapest, Hungary
fYear :
2012
fDate :
10-13 July 2012
Firstpage :
580
Lastpage :
587
Abstract :
Multi-core CPUs are very efficient at executing multiple threads at the same time without significant performance penalty; this capability, however, results in increasing demand for the memory and the caches, which not only have to serve multiple parallel requests but also have to endure the consequences of parallel programming. The performance of parallel applications is not only limited by the CPU and the internal level of parallelism that the algorithms and data structures allow, but is also restricted by their memory characteristics. Altering the data structure for example to work with machine word-sized pointers required by atomic operations incurs additional cache misses, while a lock protecting a critical section not only consumes memory, but could also be responsible for increased memory traffic for cache-line invalidations when acquired or released. We investigate these effects and analyze the behavior of different parallelization mechanisms, both blocking and lock-free solutions, through the example of a basic data structure: a hash table.
Keywords :
cache storage; data structures; multi-threading; multiprocessing systems; atomic operation; blocking solution; cache misses; cache performance; cache-line invalidation; hash table; lock-free solution; machine word-sized pointer; memory characteristics; memory traffic; multicore CPU; multiple threads; parallel application; parallel data structure; parallel programming; parallel request; parallelism; parallelization mechanism; Containers; Data structures; Hardware; Instruction sets; Parallel processing; Scalability; Synchronization; cache efficiency; locking; non-blocking synchronization; parallel data structure; performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing with Applications (ISPA), 2012 IEEE 10th International Symposium on
Conference_Location :
Leganes
Print_ISBN :
978-1-4673-1631-6
Type :
conf
DOI :
10.1109/ISPA.2012.87
Filename :
6280347
Link To Document :
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