DocumentCode
3091397
Title
A sub-resonant 40GHz clock distribution network with near zero skew
Author
Aryanfar, Farshid ; Wu, Ting ; Koochakzadeh, Masoud ; Werner, Carl ; Chang, Ken
Author_Institution
Rambus Inc., Los Altos, CA, USA
fYear
2010
fDate
23-28 May 2010
Firstpage
1190
Lastpage
1193
Abstract
A sub-resonant mm-wave clock distribution network is presented. The proposed solution introduces near zero skew while consumes significantly less power than alternative approaches such as mesh networks. The clock distribution network was implemented using the TSMC 40 nm LP CMOS process and measured using a 4-port vector network analyzer. It measures sub-psec skew from 36.6 to 40.2 GHz with less than 20% power penalty compared to resonant solutions.
Keywords
CMOS integrated circuits; logic design; millimetre wave integrated circuits; TSMC 40 nm LP CMOS process; frequency 36.6 GHz to 40.2 GHz; frequency 40 GHz; near zero skew; subresonant mm-wave clock distribution network; vector network analyzer; Bandwidth; CMOS process; Capacitance; Clocks; Frequency; Jitter; Power measurement; Resonance; Transmission line measurements; Wiring; Active delay-line; clock network; delay line; jitter; resonance; skew; transmission line;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest (MTT), 2010 IEEE MTT-S International
Conference_Location
Anaheim, CA
ISSN
0149-645X
Print_ISBN
978-1-4244-6056-4
Electronic_ISBN
0149-645X
Type
conf
DOI
10.1109/MWSYM.2010.5515024
Filename
5515024
Link To Document