• DocumentCode
    309175
  • Title

    Practical applications of photo-defined micro-via technology (PhotoLinkTM)

  • Author

    McDermott, Brian J. ; Tryzbiak, S.

  • Author_Institution
    Continental Circuits Inc., FL, USA
  • fYear
    1997
  • fDate
    9-12 Mar 1997
  • Firstpage
    24
  • Lastpage
    28
  • Abstract
    Current high density SMT designs and many of the future designs, as we move towards Chip-Scale Packaging (CSP), will require increased price/performance of the PCB. Conventional mechanical drilling and blind/buried via technologies are reaching their design limitations. Photoimageable dielectrics may be the most cost effective and the least time to market of the higher density technologies. This is a fundamental change in the way we make PCB´s. It will provide the process capability in terms of via size to meet the longer term interconnect density requirements. This technology is available today to enable the implementation of higher density SMT and CSP designs. It provides significant advantages in terms of physical design rules and also electrical design
  • Keywords
    integrated circuit packaging; printed circuit manufacture; surface mount technology; CSP designs; PhotoLink; chip-scale packaging; high density SMT designs; photo-defined micro-via technology; photoimageable dielectrics; via size; Chip scale packaging; Connectors; Costs; Drilling; Electronics packaging; Engineering management; Integrated circuit interconnections; Personal digital assistants; Portable computers; Surface-mount technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Packaging Materials. Proceedings., 3rd International Symposium on
  • Conference_Location
    Braselton, GA
  • Print_ISBN
    0-7803-3818-9
  • Type

    conf

  • DOI
    10.1109/ISAPM.1997.581246
  • Filename
    581246