DocumentCode :
309179
Title :
Low cost solder flip chip
Author :
Rinne, Glenn A. ; Magill, Paul A.
Author_Institution :
MCNC Interconnection & Packaging Technol., Research Traingle Park, NC, USA
fYear :
1997
fDate :
9-12 Mar 1997
Firstpage :
113
Lastpage :
114
Abstract :
Since the advent of flip chip packaging technology in the solid logic technology (SLT) of IBM in the early 1960s, a great deal of thought and energy has been invested toward making flip chip cost competitive with wirebonding. While this goal has been occasionally met in the intervening years, the relentless progress of wirebond technology has repeatedly regained the advantage
Keywords :
flip-chip devices; soldering; IBM; packaging; solder flip chip; solid logic technology; wire bonding; Aluminum; Costs; Etching; Flip chip; Integrated circuit interconnections; Logic; Packaging; Protection; Solids; Surface tension;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Packaging Materials. Proceedings., 3rd International Symposium on
Conference_Location :
Braselton, GA
Print_ISBN :
0-7803-3818-9
Type :
conf
DOI :
10.1109/ISAPM.1997.581270
Filename :
581270
Link To Document :
بازگشت