• DocumentCode
    3092580
  • Title

    Multiple-multicast on FB-Clos network

  • Author

    Gu, Naijie ; Li, Dong ; Pan, Wei

  • Author_Institution
    Dept. of Comput. Sci. & Technol., Univ. of Sci. & Technol. of China, China
  • fYear
    2002
  • fDate
    23-25 Oct. 2002
  • Firstpage
    359
  • Lastpage
    364
  • Abstract
    Multicast and multiple-multicast are important operations in parallel and distributed systems, and can be performed without blocking on a Clos network. However, the hardware cost of a non-blocking multicast and multiple-multicast Clos network is very high. The necessary and sufficient condition of a non-blocking multiple-multicast Clos network is that the number of middle-stage switches m satisfies m/spl ges//spl Theta/(n(log/r)/(log log r)), while there are r switches of n/spl times/m in the input stage. In a N/spl times/N Clos network the routing time complexity of the multicast algorithm is /spl Theta/(N) and that of multiple-multicast is /spl Theta/(N/sup 3/2/). We present an algorithm for multiple-multicast on a FB-Clos network which we proposed previously. The sufficient number of middle-stage switches for non-blocking multiple-multicast on a FB-Clos network decreases from m/spl ges//spl Theta/(n(log r)/(log log r)) to m/spl ges/3n+r-1. The routing time complexity of the algorithm for multiple-multicast decreases from /spl Theta/(N/sup 3/2/) to /spl Theta/(log/sup 2/ N log m). Both the hardware cost and routing time complexity are much lower than those of the Clos network.
  • Keywords
    communication complexity; multicast communication; network routing; parallel algorithms; FB-Clos network; distributed systems; hardware cost; middle-stage switches; multicast algorithm; nonblocking multiple-multicast; parallel systems; routing time complexity; Bipartite graph; Communication switching; Computer science; Costs; Hardware; Multicast algorithms; Neural networks; Routing; Sufficient conditions; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Algorithms and Architectures for Parallel Processing, 2002. Proceedings. Fifth International Conference on
  • Conference_Location
    Beijing, China
  • Print_ISBN
    0-7695-1512-6
  • Type

    conf

  • DOI
    10.1109/ICAPP.2002.1173602
  • Filename
    1173602