• DocumentCode
    3092950
  • Title

    A Multilevel Parallel Intra Coding for H.264/AVC Based on CUDA

  • Author

    Su, Huayou ; Wu, Nan ; Zhang, Chunyuan ; Wen, Mei ; Ren, Ju

  • Author_Institution
    Sch. of Comput., Nat. Univ. of Defense Technol., Changsha, China
  • fYear
    2011
  • fDate
    12-15 Aug. 2011
  • Firstpage
    76
  • Lastpage
    81
  • Abstract
    In this paper, we propose a multilevel parallel intra coding for H.264/AVC based on computed unified device architecture (CUDA). The proposed parallel algorithm improves the parallelism between 4×4 blocks within a macro block (MB) by throwing off some inappreciable prediction modes. By partitioning a frame into multi-slice, the parallelism between MBs can be exploited. In addition, a scalable parallel method for kernels is introduced to improve the performance of the proposed intra coding. Experimental results show that, more than 20 times speedup can be achieved with the assistance of GPU. Moreover, the entire encoder can meet the real-time processing requirement for HDTV.
  • Keywords
    coprocessors; parallel algorithms; video coding; CUDA; GPU; H.264/AVC; HDTV; computed unified device architecture; frame partitioning; multilevel parallel intra coding; multislice frame; parallel algorithm; real-time processing; scalable parallel method; Encoding; Graphics processing unit; Hardware; Image coding; Instruction sets; Kernel; Parallel processing; CUDA; intra coding; multilevel; parallelism;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Image and Graphics (ICIG), 2011 Sixth International Conference on
  • Conference_Location
    Hefei, Anhui
  • Print_ISBN
    978-1-4577-1560-0
  • Electronic_ISBN
    978-0-7695-4541-7
  • Type

    conf

  • DOI
    10.1109/ICIG.2011.99
  • Filename
    6005536