Reducing implementation complexity of fast sampled digital IIR filters

It has been shown that the delta operator has superior roundoff noise performance over the conventional operator in digital filter realizations with high sampling rates compared to the underlying signal bandwidth. This paper surveys the implementation complexity of delta operator realizations compared to conventional delay realizations. Fast pipelined architecture and direct form II transposed filter structure are used for comparison. Implementation complexities of the two realizations are compared and the results are verified with a narrowband example filter. It is shown that in typical narrowband filtering applications the delta realization leads to significantly lower implementation complexity with up to 45% savings in hardware