Pipeline architecture for DCT/IDCT

Author

Nikara, Jari ; Takola, J. ; Akopian, David ; Saarinen, Jukka

Author_Institution

Digital & Comput. Syst. Lab., Tampere Univ., Finland

Volume

4

fYear

2001

fDate

6-9 May 2001

Firstpage

902

Abstract

In this paper, a unified sequential architecture for 8-point discrete cosine transform and its inverse is described. The architecture is based on rescheduled constant geometry algorithms, which are mapped onto a one-dimensional structure with the aid of vertical projection. The resulting modular architecture can be efficiently pipelined since arithmetic units are removed from the critical path. In addition, the complexity of the architecture is compared to other previously reported architectures operating over sequential data

Keywords

computational geometry; discrete cosine transforms; parallel architectures; pipeline processing; 8-point discrete cosine transform; DCT; IDCT; complexity; modular architecture; one-dimensional structure; pipeline architecture; rescheduled constant geometry algorithms; unified sequential architecture; vertical projection; Arithmetic; Computer architecture; Concurrent computing; Costs; Discrete cosine transforms; Geometry; Parallel processing; Pipeline processing; Signal processing algorithms; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.922384

Filename

922384