Comparison of supply noise and substrate noise reduction in SiGe BiCMOS and FDSOI processes

Author

Cheong, Wai Leng ; Owens, Brian ; Pham, Hui En ; Hanken, Christopher ; Le, Jim ; Fiez, Terri ; Mayaram, Kartikeya

Author_Institution

Sch. of EECS, Oregon State Univ., Corvallis, OR

fYear

2009

fDate

16-18 March 2009

Firstpage

112

Lastpage

115

Abstract

In this paper, substrate noise suppression for 0.18 mum SiGe BiCMOS and fully-depleted silicon on insulator (FDSOI) processes is evaluated and compared. For both technologies, the most effective way for substrate noise reduction is assessed to identify the best approach for noise mitigation. The results show that the FDSOI process with large separation between analog and digital blocks is a more efficient substrate crosstalk suppression method compared to the best case in the SIGe BiCMOS process.

Keywords

BiCMOS integrated circuits; Ge-Si alloys; semiconductor materials; silicon-on-insulator; BiCMOS; SiGe; fully-depleted silicon on insulator; noise mitigation; size 0.18 mum; substrate crosstalk suppression method; substrate noise reduction; BiCMOS integrated circuits; Circuit noise; Circuit testing; Coupling circuits; Crosstalk; Germanium silicon alloys; Integrated circuit noise; Noise reduction; Silicon germanium; Silicon on insulator technology; SOI; SiGe BiCMOS; noise reduction; substrate noise; substrate noise comparison;

fLanguage

English

Publisher

ieee

Conference_Titel

Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design

Conference_Location

San Jose, CA

Print_ISBN

978-1-4244-2952-3

Electronic_ISBN

978-1-4244-2953-0

Type

conf

DOI

10.1109/ISQED.2009.4810279

Filename

4810279