Title :
UNUM: a tinker-toy approach to building multicore PowerPC microarchitectures
Author_Institution :
Comput. Sci. & Artificial Intelligence Lab., Massachusetts Inst. of Technol., Cambridge, MA, USA
Abstract :
Summary form only for tutorial. The goal of the UNUM project is to show that it is possible to synthesize many different PowerPC models (both existing and new variants) quickly by using a library of microarchitectural IP blocks. The IP blocks and modules that we are developing include instruction decoder, branch predictor, speculative execution structures, ALUs, LI and L2 cache structures, and cache-coherence engines. This project in addition to providing PowerPC gateware for others to use, will shed light on how IP blocks should be written to be easily modifiable and reusable.
Keywords :
cache storage; integrated circuit design; microprocessor chips; PowerPC models; UNUM project; branch predictor; cache structures; cache-coherence engines; instruction decoder; microarchitectural IP blocks; multicore microarchitectures; speculative execution structures;
Conference_Titel :
VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on
Conference_Location :
Hyderabad, India
Print_ISBN :
0-7695-2502-4
DOI :
10.1109/VLSID.2006.164
