DocumentCode :
3093740
Title :
Design of a 1 V low power 900 MHz QVCO
Author :
Saha, Prabir K. ; Dutta, Ashudeb ; Patra, A. ; Bhattacharyya, T.K.
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Kharagpur, India
fYear :
2006
fDate :
3-7 Jan. 2006
Abstract :
This paper describes the design of a 1 V, 900 MHz quadrature voltage controlled oscillator (QVCO) implemented in 0.18μm CMOS technology. The VCO can be tuned from 825 to 975 MHz, which corresponds to a tuning range of 16.6%, consuming only 3.5 mW of power for quadrature signal outputs. The phase noise of the VCO is -136 dBc/Hz at 3 MHz offset from 900 MHz. The VCO features discrete tuning using switched capacitors with a Kvco of 50 MHz/V which makes it very suitable for using in a PLL. Challenges with low voltage implementation of the VCO and modifications required both at device and circuit level are discussed in detail. Novel design of the VCO has also ensured very low supply sensitivity of the output frequency (KVDD = 6 MHz/V) despite low supply voltage.
Keywords :
CMOS integrated circuits; circuit tuning; integrated circuit design; low-power electronics; phase locked oscillators; voltage-controlled oscillators; 0.18 micron; 1 V; 3 MHz; 3.5 mW; 825 to 975 MHz; 900 MHz; CMOS technology; PLL; quadrature voltage controlled oscillator; switched capacitors; CMOS technology; Capacitors; Circuits; Energy consumption; Frequency; Inductors; Low voltage; Phase noise; Tuning; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on
ISSN :
1063-9667
Print_ISBN :
0-7695-2502-4
Type :
conf
DOI :
10.1109/VLSID.2006.65
Filename :
1581432
Link To Document :
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