Analysis of DSP-kernel software by implicit cache simulation

We introduce a new approach to performance analysis of DSP-kernel software, based on high-level abstractions, called implicit cache simulation. The method can take into account any kind of instruction cache as well as code allocation effects. We show that no loss of estimation accuracy is implied by the proposed abstractions. Moreover the speed of the method is such that it can be efficiently used as a system-level design tool. We compare implicit cache simulation with the trace-driven simulation approach, commonly used in industry. Experimental results show that our method is 4 times faster in the average and up to 11 times faster than trace-driven simulation.