Title :
IP protection platform based on watermarking technique
Author :
Du, Yun ; Ding, Yangshuo ; Chen, Yujie ; Gao, Zhiqiang
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing
Abstract :
Intellectual property (IP) block reuse is becoming the mainstream of system-on-chip (SOC) design. However, the trade of IP blocks poses significant high security risks. Consequently IP protection becomes sensitive and urgent. In this paper, DesignMarker platform used for IP protection is proposed, which is based on watermarking technique. Both netlist-level watermarking module and layout-level watermarking module are integrated with this platform. Through this platform, watermarking message can be embedded into IP at netlist-level or layout-level with few overhead costs. What´s more, the platform can be extended and improved with new watermarking modules.
Keywords :
electronic engineering computing; industrial property; system-on-chip; watermarking; DesignMarker platform; IP protection platform; intellectual property block reuse; system-on-chip design; watermarking technique; Authentication; Costs; Intellectual property; Microelectronics; Packaging; Protection; Robustness; Security; System-on-a-chip; Watermarking; IP; Watermarking; layout; netlist; protection;
Conference_Titel :
Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2952-3
Electronic_ISBN :
978-1-4244-2953-0
DOI :
10.1109/ISQED.2009.4810309
