DocumentCode
3093966
Title
MoM - a process variation aware statistical capacitance extractor
Author
Ananthakrishna, Rohit ; Batterywala, Shabbir
Author_Institution
ATG, Synopsys Pvt. Ltd., Bangalore, India
fYear
2006
fDate
3-7 Jan. 2006
Abstract
With the advent of newer technologies, the underlying manufacturing processes are becoming more complicated. This results in substantial variations between mask and actual fabricated geometries of the conductors. These variations in geometries can lead to significant differences in the interconnect capacitances computed using mask and actual geometries. The sources for these variations could be many and the variations could be independent or correlated. We present a novel extension to the statistical Monte-Carlo capacitance extractor to take into account the statistical models of these variations. The variations are handled by an additional Monte-Carlo sampling; hence termed Monte-Carlo over Monte-Carlo (MoM). Our technique reports the expected value and the expected spread of the capacitances along with the co-variance among the different capacitances. We demonstrate the correctness, accuracy and scalability of our technique analytically and experimentally.
Keywords
Monte Carlo methods; capacitance measurement; integrated circuit interconnections; integrated circuit modelling; sampling methods; Monte-Carlo capacitance extractor; Monte-Carlo sampling; interconnect capacitances; mask; process variation; statistical capacitance extractor; statistical models; Character generation; Chemical technology; Computational geometry; Conductors; Delay; Manufacturing processes; Message-oriented middleware; Parasitic capacitance; Sampling methods; Scalability;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on
ISSN
1063-9667
Print_ISBN
0-7695-2502-4
Type
conf
DOI
10.1109/VLSID.2006.119
Filename
1581444
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