DocumentCode :
3094076
Title :
μ spider: a CAD tool for efficient NoC design
Author :
Evain, S. ; Diguet, J.-P. ; Houzet, D.
Author_Institution :
ETR-NSA, UMR 6164 CNRS, ReMes 1 Univ., 20, av. Buttes de Coesmes, 35043 Rermes Cedex - France
fYear :
2004
fDate :
8-9 Nov. 2004
Firstpage :
218
Lastpage :
221
Abstract :
In this paper, we present a generic router and a tool that allow the designer to easily and quickly customise a NoC in order to meet the requirements of a set of applications. Our router addresses what we consider as the main features of a realistic and useful NoC. Firstly, it supports the management of different levels quality of service (QoS) allowing guaranteed throughput service in addition to the classical best effort service. Secondly, it is associated to a CAD tool, which can fully configure and generate the NoC VHDL code at the RTL level. The paper presents the muter architecture and its various custom characteristics as well as their impacts on the performance of the system.
Keywords :
Application software; Clocks; Debugging; Design automation; Network-on-a-chip; Packet switching; Quality management; Quality of service; Switches; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Norchip Conference, 2004. Proceedings
Conference_Location :
Oslo, Norway
Print_ISBN :
0-7803-8510-1
Type :
conf
DOI :
10.1109/NORCHP.2004.1423862
Filename :
1423862
Link To Document :
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