DocumentCode :
30943
Title :
Random-Walk Drift-Diffusion Charge-Collection Model For Reverse-Biased Junctions Embedded in Circuits
Author :
Glorieux, M. ; Autran, J.L. ; Munteanu, Daniela ; Clerc, Sylvain ; Gasiot, Gilles ; Roche, Philippe
Author_Institution :
STMicroelectron., Crolles, France
Volume :
61
Issue :
6
fYear :
2014
fDate :
Dec. 2014
Firstpage :
3527
Lastpage :
3534
Abstract :
A new computational model for charge transport based on parallelized random-walk drift-diffusion is proposed. This approach models the radiation-induced charge carriers as charge packets in a 3-D structure and the transport modeling are based on simple physical equations without any fitting parameter. This model has been dynamically coupled with a SPICE circuit simulator to take into account temporal variations of the electric fields in the charge collection process. Thus, the circuit electrical response modulates the charge collection efficiency. Three simulation cases have been explored and compared with TCAD simulations or radiation experiments in 65 nm technology to validate the accuracy of the proposed approach. These simulations demonstrate the capability of the proposed model to accurately estimate the soft error rate of complex structures, such as flip-flops over a large range of ionizing particle linear energy transfer. The proposed simulation methodology is also able to take into account charge-sharing phenomenon, and this point is highlighted by a specific investigation on the considered flip-flop.
Keywords :
SPICE; flip-flops; integrated circuit modelling; radiation hardening (electronics); 3D structure; SPICE circuit simulator; TCAD simulations; charge collection efficiency; charge packets; charge transport modelling; charge-sharing phenomenon; circuit electrical response; complex structures; electric fields; flip-flops; ionizing particle linear energy transfer; parallelized random-walk drift-diffusion; physical equations; radiation-induced charge carriers; random-walk drift-diffusion charge-collection model; reverse-biased junctions; size 65 nm; soft error rate; Charge carriers; Circuit simulation; Integrated circuit modeling; Junctions; SPICE; Single event upsets; Charge collection; charge sharing; circuit modeling; radiation transport modeling; single-event modeling; single-event upset;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/TNS.2014.2362073
Filename :
6949164
Link To Document :
بازگشت