Title :
A 2 V 7.2/spl deg/ jitter AM-suppression CMOS amplifier using current-mode hybrid magnitude control
Author :
Wang, C.-K. ; Huang, K.-H. ; Yang, T.-H. ; Deng, T.-L.
Author_Institution :
Nat. Central Univ., Chung-Li, Taiwan
Abstract :
An AM-suppression CMOS amplifier conjoins a discrete automatic-gain control (AGC) and a hysteresis hard limiter, reduces magnitude-dependent jitter and speeds up AM-suppression response. The discrete gain control is composed of a transition-based magnitude control and a current-mode variable-gain amplifier (VGA) and does not require coherent detection and external components. The prototype demonstrates 7.2/spl deg/ jitter from 1MHz PPM data for input dynamic range of 20 dB, six times better than conventional approaches. The amplifier occupies 0.64 mm/sup 2/ using 0.8 /spl mu/m digital CMOS technology and consumes 18 mW from a single 2 V supply.
Keywords :
CMOS analogue integrated circuits; 0.8 micron; 1 MHz; 18 mW; 2 V; AM-suppression; CMOS amplifier; CMOS technology; PPM data; current-mode hybrid magnitude control; current-mode variable-gain amplifier; discrete automatic-gain control; hysteresis hard limiter; input dynamic range; magnitude-dependent jitter; transition-based magnitude control; Bandwidth; CMOS technology; Counting circuits; Gain control; Hysteresis; Jitter; Logic; Pulse amplifiers; Pulse width modulation; Transconductors;
Conference_Titel :
Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-4344-1
DOI :
10.1109/ISSCC.1998.672493
