DocumentCode
3094583
Title
On temperature planarization effect of copper dummy fills in deep nanometer technology
Author
Datta, Basab ; Burleson, Wayne
Author_Institution
Electr. & Comput. Eng. Dept., Univ. of Massachusetts, Amherst, MA
fYear
2009
fDate
16-18 March 2009
Firstpage
494
Lastpage
499
Abstract
The continuous increase in interconnect joule heating and the advent of low-k ILD materials poses serious thermal challenges for multilevel interconnects in deep nanometer technologies. Vertical heat sinking paths are severely constrained by the limited via-density of the upper metal layers and poor thermal conductivity of the inter-layer dielectric. The lack of adequate vertical thermal conduction can lead to formation of `heat-traps` in the metal-layers affecting both performance and reliability of structures in the vicinity. We propose the usage of dummy metal-fills as horizontal thermal conduits to planarize hotspots generated in thermally isolated zones. The metal fills which are an integral part of the CMP planarization process can improve the effective thermal conductivity of the metal layers and can be used to carry out controlled heat re-direction. We have performed 3-D thermal simulations using an FEM solver and validated our scheme for different metal layers. With a pattern-density overhead of <=5%, the temperature differences across measurement points can be reduced by 50-70%. We have evaluated the efficacy of different metal shapes, sizes and orientation in terms of their heat-spreading capability.
Keywords
chemical mechanical polishing; copper; finite element analysis; low-k dielectric thin films; planarisation; thermal conductivity; 3-D thermal simulations; CMP; FEM; copper dummy fills; deep nanometer technology; horizontal thermal conduits; inter-layer dielectric; multilevel interconnects; planarization; thermal conductivity; vertical heat sinking paths; vertical thermal conduction; Conducting materials; Copper; Dielectric materials; Heat sinks; Heating; Planarization; Shape; Temperature control; Temperature measurement; Thermal conductivity;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-2952-3
Electronic_ISBN
978-1-4244-2953-0
Type
conf
DOI
10.1109/ISQED.2009.4810344
Filename
4810344
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