DocumentCode :
3094805
Title :
Plasma-induced polarity dependent hot-carrier response of CMOS devices across a wafer
Author :
Janapaty, V. ; Bhava, B. ; Kerns, S. ; Bui, N.
Author_Institution :
LSI Logic Corp., Menlo Park, CA, USA
fYear :
1997
fDate :
13-16 Oct 1997
Firstpage :
13
Lastpage :
15
Abstract :
In this study, plasma-processed devices are subjected to hot-carrier stressing experiments to evaluate the reliability across the wafer. Devices with N+-P, P+-N, both N+-P and P+-N diodes, and no protection diode, are used to establish the nature of the injection (gate and substrate) conditions across the wafer. Results show that P-channel devices subjected to gate injection during plasma processing show higher degradation than those subjected to substrate injection. N-MOSFETs subjected to gate injection during plasma processing show a higher antenna ratio dependence than those subjected to substrate injection. Also, a linear relationship is observed between the pre-stress trapped positive charge in the oxide and threshold voltage shift after hot-carrier stress. Gate injection during plasma processes creates higher trapped positive charge and hence the hot-carrier lifetime of devices subjected to gate injection can be significantly lower than that of devices subjected to substrate injection
Keywords :
CMOS integrated circuits; MOSFET; hot carriers; integrated circuit reliability; integrated circuit testing; integrated circuit yield; semiconductor diodes; sputter etching; CMOS devices; N-MOSFETs; N+-P diodes; P-channel devices; P+-N diodes; across-wafer reliability; antenna ratio dependence; device degradation; gate injection; hot-carrier lifetime; hot-carrier stress; hot-carrier stressing; oxide pre-stress trapped positive charge; plasma processing; plasma-induced polarity dependent hot-carrier response; plasma-processed devices; protection diode; substrate injection; threshold voltage shift; trapped positive charge; Diodes; Etching; Hot carriers; MOSFET circuits; Plasma applications; Plasma devices; Plasma materials processing; Protection; Stress; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Reliability Workshop Final Report, 1997 IEEE International
Conference_Location :
Lake Tahoe, CA
Print_ISBN :
0-7803-4205-4
Type :
conf
DOI :
10.1109/IRWS.1997.660273
Filename :
660273
Link To Document :
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