DocumentCode :
3094833
Title :
Design of heterogeneous embedded systems using DFCharts model of computation
Author :
Radojevic, Ivan ; Salcic, Zoran ; Roop, Partha
Author_Institution :
Dept. of Electr. & Comput. Eng., Auckland Univ., New Zealand
fYear :
2006
fDate :
3-7 Jan. 2006
Abstract :
Dataflow process networks have been successfully used for modeling signal processing systems which are data-dominated. In this family of models, the most popular one is synchronous dataflow (SDF). On the other hand, hierarchical concurrent finite state machines (HCFSM) have been successfully employed for control-dominated systems. Most complex embedded systems are heterogeneous, consisting of both control-dominated and data-dominated parts. In this paper, we introduce a new model of computation, called DFCharts, which targets heterogeneous embedded systems. It combines the HCFSM (with Argos semantics) and SDF models. It has a formal, operational semantics based on Boolean automata with variables.
Keywords :
data flow graphs; embedded systems; finite state machines; Argos semantics; Boolean automata; DFCharts model; control-dominated systems; data-dominated systems; dataflow process networks; heterogeneous embedded system; hierarchical concurrent finite state machines; operational semantics; signal processing system; synchronous dataflow; Automata; Automatic control; Computational modeling; Control system synthesis; Control systems; Electronic mail; Embedded computing; Embedded system; Signal processing; Synchronization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on
ISSN :
1063-9667
Print_ISBN :
0-7695-2502-4
Type :
conf
DOI :
10.1109/VLSID.2006.67
Filename :
1581493
Link To Document :
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