DocumentCode
3095119
Title
Multiprocessor scheduling for high quality digital audio
Author
Amphlett, R.W. ; Bull, D.R.
Author_Institution
Centre for Commun. Res., Bristol Univ., UK
fYear
1995
fDate
34850
Firstpage
42401
Lastpage
42408
Abstract
The paper describes investigations into multiprocessor scheduling techniques for high quality audio DSP. A DSP processor/multiprocessor simulator is introduced which allows register-level simulation of multiprocessor DSP architectures and parallel DSP algorithms. The simulator has been used to investigate the implementation of recursive filtering algorithms for audio, using multiprocessor DSP architectures. Results from these studies are presented and discussed. Also described are multiprocessor DSP algorithm mapping and scheduling techniques based on genetic algorithms. These investigate techniques using genetic algorithms to schedule audio DSP algorithms written in the form of data flow graphs onto specified DSP multiprocessor arrays. The basic techniques are described and initial results from these studies are also presented and discussed
Keywords
IIR filters; audio signals; cascade networks; data flow graphs; digital simulation; genetic algorithms; parallel algorithms; processor scheduling; recursive filters; DSP architectures; DSP processor/multiprocessor simulator; data flow graphs; genetic algorithms; high quality digital audio; mapping and scheduling techniques; multiprocessor scheduling techniques; parallel DSP algorithms; recursive filtering algorithms; register-level simulation;
fLanguage
English
Publisher
iet
Conference_Titel
Multiprocessor DSP (Digital Signal Processing) - Applications, Algorithms and Architectures, IEE Colloquium on (Digest No.1995/116)
Conference_Location
London
Type
conf
DOI
10.1049/ic:19950775
Filename
405162
Link To Document