Title :
Real time dynamic receive apodization for an ultrasound imaging system
Author :
Bhattacharyya, J. ; Mandal, P. ; Banerjee, Rohan ; Banerjee, Swapna
Author_Institution :
Dept. of E & EC., IIT, Kharagpur, India
Abstract :
This paper proposes an algorithm and its VLSI implementation to generate the aperture weighting coefficients for an ultrasound imaging system in real time. The side lobe reduction capability of the proposed scheme has been compared with existing methods and satisfactory results have been obtained. The design has been implemented using XCV2000EBG560 Xilinx FPGA and for a typical 64 channel beamformer (100 scan lines, 512 scan points on each line) found to operate at 40 frames/s. Further speed enhancement in the existing design, if necessary, can easily be made by just using identical blocks in parallel and very small change in the control structure.
Keywords :
VLSI; biomedical ultrasonics; field programmable gate arrays; ultrasonic arrays; ultrasonic imaging; VLSI implementation; XCV2000EBG560 Xilinx FPGA; aperture weighting coefficients; field programmable gate arrays; real time dynamic receive apodization; ultrasound imaging system; Apertures; Delay effects; Field programmable gate arrays; Image resolution; Pipeline processing; Real time systems; Signal resolution; Spatial resolution; Ultrasonic imaging; Very large scale integration;
Conference_Titel :
VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on
Print_ISBN :
0-7695-2502-4
DOI :
10.1109/VLSID.2006.138
