DocumentCode
3095794
Title
An 8 b resolution 360 /spl mu/s write time nonvolatile analog memory based on differentially balanced constant-tunneling-current scheme (DBCS)
Author
Kim, K.-H. ; Lee, K.
fYear
1998
fDate
5-7 Feb. 1998
Firstpage
336
Lastpage
337
Abstract
This fast accurate nonvolatile analog memory (NVAM) cell is based on EEPROMs. Programming rate is constant using a single program pulse, enhancing programming speed and accuracy. A prototype chip containing 8/spl times/128 9/spl times/13.6 /spl mu/m/sup 2/ NVAM cells uses 0.8 /spl mu/m 2-poly CMOS. Each cell stores more than 8 b levels in 360 /spl mu/s.
Keywords
analogue storage; 0.8 micron; 360 mus; 8 bit; CMOS; EEPROMs; NVAM; differentially balanced constant-tunneling-current scheme; nonvolatile analog memory; programming rate; programming speed; write time; Acceleration; Analog memory; Degradation; EPROM; Feedback; Nonvolatile memory; Operational amplifiers; Prototypes; Tunneling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-4344-1
Type
conf
DOI
10.1109/ISSCC.1998.672500
Filename
672500
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