Reconfigurable hardware for tomographic processing

Reconstruction of tomographic images using projection-based algorithms is a computationally intensive process which performs well on high-speed computing devices. As an alternative for affordable tomographical processing, a RAM FPGA-based system is evaluated here as a reconfigurable hardware system where each particular task involved in the tomographic processing could be served by an appropriate system configuration implementing a dedicated hardware architecture. Residue number systems (RNS) are investigated for the implementation of convolution backprojection and it is shown that RNS additions and multiplications can be evaluated at high speeds by customized pipelined architectures mapped into RAM FPGAs where the quality of reconstructed images is compatible with images reconstructed under floating point arithmetic