DocumentCode :
3097099
Title :
DSP Implementation of digitally controlled SMPS
Author :
Zhang, Jie ; Zou, Yunping ; Zhang, Yun ; Tang, Jian
Author_Institution :
HUST, Wuhan
fYear :
2007
fDate :
5-8 Nov. 2007
Firstpage :
1484
Lastpage :
1488
Abstract :
This paper describes the design and implement of digitally controlled Switching Mode Power Supply (SMPS) that can meet the specifications of steady- state and dynamic requirements. In this architecture, the primary-side DSP can easily implement the control of two interleaved PFCs and one phase-shift full-bridge (PSFB) PWM DC-DC converter. To realize high power density, Peak-current flux bias control can get rid of blocking capacitor to reduce freewheeling time and duty cycle loss. The modeling of quantization effect and analysis of limit cycle are described in the following part of this paper. In the end of this paper, the operation principle and design consideration are described and verified on a 3 kW, 110 kHz experimental power supply.
Keywords :
DC-DC power convertors; PWM power convertors; bridge circuits; digital control; digital signal processing chips; phase shifters; power capacitors; power factor correction; switched mode power supplies; DSP; blocking capacitors; duty cycle loss; frequency 110 kHz; peak-current flux bias control; phase shift full-bridge PWM DC-DC converter; power 3 kW; quantization effect; switching mode power supply; two interleaved PFC; Communication system control; Control systems; DC-DC power converters; Digital control; Digital signal processing; Limit-cycles; Pulse width modulation; Pulse width modulation converters; Switched-mode power supply; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Electronics Society, 2007. IECON 2007. 33rd Annual Conference of the IEEE
Conference_Location :
Taipei
ISSN :
1553-572X
Print_ISBN :
1-4244-0783-4
Type :
conf
DOI :
10.1109/IECON.2007.4460093
Filename :
4460093
Link To Document :
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