DocumentCode :
3097119
Title :
Investigation of on-chip phase-noise reduction using self-injection technique on fully integrated frequency dividers
Author :
Sanghun Lee ; Jusung Kim ; Cam Nguyen
Author_Institution :
Electr. & Comput. Eng. Dept., Texas A&M Univ., College Station, TX, USA
fYear :
2012
fDate :
4-7 Dec. 2012
Firstpage :
655
Lastpage :
657
Abstract :
Significant phase-noise improvement is demonstrated using a self-injection technique on a fully integrated 0.18-μm CMOS divide-by-3 (1/3) injection-locked frequency divider (ILFD). The self-injection is realized with an odd-to-even harmonic converter followed by a feedback-amplifier. The self-injection 1/3 ILFD shows superior injection efficiency due to the increased self-injection signal which results in substantial phase noise reduction. The phase noise is improved by 14.77 dB at 1-MHz offset when the self-injection loop is enabled. The core of the 1/3 ILFD occupies 0.048-mm2 area and dissipates 18.2-mW from a 1.8-V power supply. The phase-noise reduction technique can be implemented for other kinds of ILFDs.
Keywords :
frequency dividers; CMOS; feedback amplifier; frequency 1 MHz; frequency dividers; harmonic converter; injection locked frequency divider; noise figure 14.77 dB; on chip phase noise reduction; phase noise improvement; phase noise reduction technique; power 18.2 mW; self injection loop; self injection signal; self injection technique; size 0.18 mum; substantial phase noise reduction; superior injection efficiency; voltage 1.8 V; Feedback amplifier; Harmonic analysis; Mixers; Noise measurement; Phase noise; Voltage measurement; Injection-locked frequency divider; PLL; RFIC; phase noise; synthesizer;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference Proceedings (APMC), 2012 Asia-Pacific
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4577-1330-9
Electronic_ISBN :
978-1-4577-1331-6
Type :
conf
DOI :
10.1109/APMC.2012.6421693
Filename :
6421693
Link To Document :
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