DocumentCode :
3097557
Title :
A co-synthesis approach based on symbolic reachability analysis
Author :
Nascimento, Francisco Assis Moreira do ; Rosenstiel, Wolfgang
Author_Institution :
Wilhelm-Schickard-Inst. fur Inf., Tubingen Univ., Germany
fYear :
1998
fDate :
30 Sep-3 Oct 1998
Firstpage :
112
Lastpage :
115
Abstract :
In this paper we present a co-synthesis approach based on the state space reachability analysis of the system specification, which is captured using a partial order based model for concurrency. The partial order based model (POM) combines the concept of relations between events from event structures for the modeling of intercommunicating concurrent behaviors and the Chu space semantics for these relations in terms of logical formulas. The POM is used in our approach as an intermediate representation, which permits a concise symbolic representation, mainly for systems with high degree of parallelism, and an efficient BDD based implementation of analysis and synthesis algorithms. We introduce the partial order based model for concurrency and show how to use it in modeling at the system level. We present a symbolic representation for the model and its implementation using BDDs and we give reachability analysis algorithms that are applied to the estimation of performance and costs during the co-synthesis and to the formal verification of properties. Finally we describe our co-synthesis approach based on the formal model
Keywords :
embedded systems; formal verification; hardware-software codesign; reachability analysis; state-space methods; symbol manipulation; BDD based implementation; Chu space semantics; co-synthesis approach; concise symbolic representation; event structures; formal verification; intercommunicating concurrent behaviors; intermediate representation; logical formulas; partial order based model; state space reachability analysis; symbolic reachability analysis; Algorithm design and analysis; Binary decision diagrams; Concurrent computing; Control system synthesis; Costs; Parallel processing; Performance analysis; Reachability analysis; Specification languages; State-space methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuit Design, 1998. Proceedings. XI Brazilian Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-8186-8704-5
Type :
conf
DOI :
10.1109/SBCCI.1998.715422
Filename :
715422
Link To Document :
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