Title :
LogosPGA: synthesis system for LUT devices
Author :
Jacobi, Ricardo Pezzuol
Author_Institution :
Dept. de Ciencia da Comput., Brasilia Univ., Brazil
fDate :
30 Sep-3 Oct 1998
Abstract :
This paper presents a system for fast prototyping of digital circuits, LogosPGA. The circuit logic behavior is described in VHDL (hardware description language). This description is translated to an internal compact format based on Binary Decision Diagrams (BDD). Incompletely specified functions are minimized using an implicit two-level representation (ZBDD). Then the optimized function is decomposed and mapped into programmable logic devices
Keywords :
binary decision diagrams; field programmable gate arrays; hardware description languages; logic CAD; table lookup; FPGA design; LUT devices; LogosPGA synthesis system; VHDL; ZBDD; binary decision diagrams; circuit logic behavior; digital circuits; fast prototyping; implicit two-level representation; look-up table devices; programmable logic devices; zero suppressed BDD; Binary decision diagrams; Boolean functions; Circuit synthesis; Data structures; Digital circuits; Hardware design languages; Logic circuits; Logic devices; Prototypes; Table lookup;
Conference_Titel :
Integrated Circuit Design, 1998. Proceedings. XI Brazilian Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-8186-8704-5
DOI :
10.1109/SBCCI.1998.715445
