Title :
Parallelism extraction and programme restructuring of VHDL for parallel simulation
Author :
Vellandi, Beverly ; Lightner, Michael
Author_Institution :
Dept. of Electr. & Comput. Eng., Colorado Univ., Boulder, CO, USA
Abstract :
The authors obtained an overall increase in parallelism during VHDL simulation by decomposing simulation models into smaller computational units to be executed in parallel and by parallelizing the simulation support functions. The authors implementation targeted massively parallel architectures. Simulation experimentation and instrumentation was done on the SIMD Connection Machine
Keywords :
circuit analysis computing; discrete event simulation; logic CAD; parallel programming; shared memory systems; Connection Machine; LAMPO; SIMD; VHDL simulation; massively parallel architectures; parallel simulation; simulation support functions; Computational modeling; Computer architecture; Computer simulation; Concurrent computing; Delay; Discrete event simulation; Parallel processing; Signal processing; Signal resolution; Steady-state;
Conference_Titel :
Design Automation, 1992. Proceedings., [3rd] European Conference on
Conference_Location :
Brussels
Print_ISBN :
0-8186-2645-3
DOI :
10.1109/EDAC.1992.205899
