Low-temperature PEALD ZnO double-gate TFTs

We report double-gate ZnO thin film transistors fabricated using weak reactant plasma enhanced atomic layer deposition (PEALD) with a maximum process temperature of 200°C. When operated as bottom gate only devices the TFTs have linear region mobility of 19 cm²/V·s and the top gate can be used to vary the bottom-gate TFT threshold voltage by more than 2 V. With top and bottom gates connected together the linear region mobility increases to 24 cm²/V·s, with a subthreshold slope of 160 mV/decade. The low process temperature of these devices allows simple fabrication on polyimide and other flexible polymeric substrates. Double gate TFTs are of interest to allow threshold voltage tuning, improved device performance and stability, and for circuit applications like mixers and analog circuits design. Double gate TFTs have been demonstrated using GIZO[1, 2]; however, these reports used a maximum process temperature of 350°C, too high for flexible polymeric substrates. We have previously reported high quality ZnO TFTs fabricated on both glass and plastic substrates using weak reactant PEALD with a maximum process temperature of 200°C[3, 4]. We now report double gate TFTs with the same maximum process temperature.