Title :
Verification of self-checking properties by means of output code space computation
Author :
Nicolaidis, M. ; Boudjit, M.
Author_Institution :
IMAG/TIM3, Grenoble, France
Abstract :
In complex self-checking systems several blocks (i.e. functional blocks and checkers) are embedded. In order to check the self-checking properties of such blocks one needs to know the set of vectors they receive from the blocks feeding their inputs (i.e. the code word output spaces of the source blocks). In a complex system the computation of the output spaces by means of exhaustive simulation of the system is intractable. The paper presents a tool which performs this computation with low CPU time. This tool is a part of PROTECT, a tool which is aimed at automatic generation of complex self-checking circuits
Keywords :
VLSI; automatic testing; built-in self test; circuit CAD; logic CAD; logic testing; PROTECT; automatic generation; checkers; code word output spaces; complex self-checking circuits; functional blocks; output code space computation tool; self-checking systems; source blocks; Central Processing Unit; Circuit faults; Circuit testing; Computer architecture; Electrical fault detection; Encoding; Fault detection; Hardware; Programming; Protection;
Conference_Titel :
Design Automation, 1992. Proceedings., [3rd] European Conference on
Conference_Location :
Brussels
Print_ISBN :
0-8186-2645-3
DOI :
10.1109/EDAC.1992.205916