Title :
A data flow graph exchange standard
Author :
Van Eijndhoven, Jos T J ; Stok, Leon
Author_Institution :
Eindhoven Univ. of Technol., Netherlands
Abstract :
Presents a data flow graph exchange standard, agreed upon and used by the partners in the ESPRIT research project, ASCIS. These data flow graphs are generated from known user interface languages such as Silage, VHDL, and C, and are used to drive architectural synthesis packages and formal verification. The graph semantics are defined to offer a unique degree of freedom for time and area optimizations in synthesis, by giving a maximal parallel representation and combining control and data flow in a consistent way. The graph textual exchange format was developed to allow site and application dependent extensions, without disturbing tools who do not know about these
Keywords :
circuit layout CAD; graph theory; standards; ASCIS; C; ESPRIT research project; Silage; VHDL; architectural synthesis packages; area optimizations; control flow; data flow graph exchange standard; formal verification; graph semantics; graph textual exchange format; parallel representation; time optimisation; user interface languages; Contracts; Europe; Flow graphs; Formal verification; Humans; Integrated circuit synthesis; Paper technology; Software tools; Systolic arrays; Workstations;
Conference_Titel :
Design Automation, 1992. Proceedings., [3rd] European Conference on
Conference_Location :
Brussels
Print_ISBN :
0-8186-2645-3
DOI :
10.1109/EDAC.1992.205921
