• DocumentCode
    3099252
  • Title

    Experimental comparison of wafer level reliability (WLR) and packaged electromigration tests

  • Author

    Ryu, Changsup ; Tsai, Tse Lun ; Rogers, Albert ; Jesse, Carole ; Brozek, Tomasz ; Zarr, Douglas ; Adamson, Michael ; Nayak, Sabyasachi ; Walls, James

  • Author_Institution
    Motorola Inc., Chandler, AZ, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    189
  • Lastpage
    193
  • Abstract
    The wafer level reliability (WLR) electromigration (EM) test is a quick test under very highly accelerated conditions using a parametric tester and prober on a full-sized wafer, which can provide cost effective and timely feedback on possible reliability degradation due to process variation/modification, equipment change, or misprocessing (Pierce and Snyder, 1997; McPherson, 1996). Under these highly accelerated conditions, however, there is no guarantee that the failure mechanism is the same as that for less aggressive test or operating conditions. Therefore, the validity of the WLR EM test remains controversial (Lloyd, 1992; Pierce and Brusius, 1993; Liu et al., 1999; Loh et al, 1998). In this study, we deliberately applied various realistic misprocessings on the back-end process that potentially could affect the metal reliability but may not be detectable by parametric test, and investigated the sensitivity of WLR EM, packaged EM, and parametric tests on the process variations and the correlation amongst them
  • Keywords
    electromigration; failure analysis; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; life testing; production testing; WLR EM test validity; WLR electromigration test; accelerated test conditions; back-end process; cost effectiveness; equipment change; failure mechanism; full-sized wafer; metal reliability; misprocessing; operating conditions; packaged electromigration test; parametric test; parametric tester; prober; process modification; process variation; process variations; realistic misprocessings; reliability degradation; wafer level reliability; wafer level reliability electromigration test; Automatic testing; Current density; Electromigration; Heating; Life estimation; Packaging; System testing; Temperature; Tin; Wafer scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2001. Proceedings. 39th Annual. 2001 IEEE International
  • Conference_Location
    Orlando, FL
  • Print_ISBN
    0-7803-6587-9
  • Type

    conf

  • DOI
    10.1109/RELPHY.2001.922900
  • Filename
    922900