Title :
Variable ordering for binary decision diagrams
Author :
Jeong, S.-W. ; Plessier, B. ; Hachtel, G.D. ; Somenzi, F.
Author_Institution :
Dept. of Electr. & Comput. Eng., Colorado Univ., Boulder, CO, USA
Abstract :
Considers the problem of variable ordering in binary decision diagrams (BDD´s). The authors present several heuristics for finding a good variable ordering based on the algebraic structure of the functions. They provide a non-interleaving theorem and an accurate cost formula for the optimal ordering. They treat the output ordering problem when a given circuit has multiple outputs and propose new heuristics for the problem and experimental results which enables a quick comparison of some existing heuristics and the proposed heuristics
Keywords :
decision theory; diagrams; logic CAD; network synthesis; algebraic structure; binary decision diagrams; circuit verification; heuristics; logic synthesis; multiple outputs; noninterleaving theorem; output ordering problem; variable ordering; Binary decision diagrams; Boolean functions; Circuit synthesis; Cost function; Data structures; Logic circuits; Packaging; Search methods; Zinc;
Conference_Titel :
Design Automation, 1992. Proceedings., [3rd] European Conference on
Conference_Location :
Brussels
Print_ISBN :
0-8186-2645-3
DOI :
10.1109/EDAC.1992.205974