DocumentCode
3099451
Title
A reliability methodology for low temperature data retention in floating gate non-volatile memories
Author
Kuhn, P.J. ; Hoefler, A. ; Harp, T. ; Hornung, B. ; Paulsen, R. ; Burnett, David ; Higman, J.M.
Author_Institution
Semicond. Products Sector, Motorola Inc., Austin, TX, USA
fYear
2001
fDate
2001
Firstpage
266
Lastpage
270
Abstract
A reliability assessment methodology consisting of a statistical model and designed experiments to evaluate the leakage mechanism responsible for low temperature data retention (LTDR) in floating gate nonvolatile memories is presented. The nature of the leakage mechanism and the methodology necessary to observe and accurately assess this phenomenon are described
Keywords
design of experiments; integrated circuit modelling; integrated circuit reliability; integrated memory circuits; random-access storage; LTDR; designed experiments; floating gate nonvolatile memories; leakage mechanism; low temperature data retention; reliability assessment methodology; reliability methodology; statistical model; Equations; Flash memory; Modems; Nonvolatile memory; Physics; Semiconductor device reliability; Solid modeling; Temperature distribution; Tunneling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2001. Proceedings. 39th Annual. 2001 IEEE International
Conference_Location
Orlando, FL
Print_ISBN
0-7803-6587-9
Type
conf
DOI
10.1109/RELPHY.2001.922912
Filename
922912
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