Title : 
HPSm2: A refined single-chip microengine
         
        
            Author : 
Hwu, Wen-Mei W. ; Patt, Yale N.
         
        
            Author_Institution : 
Coord. Sci. Lab., Illinois Univ., Urbana, IL, USA
         
        
        
        
        
        
        
            Abstract : 
The authors describe the high-performance single-chip microarchitecture of HPSm, which is being refined to provide a second chip, the HPSm2, with a 33% performance improvement. They relate how they are achieving this by making the HPS data path more regular and migrating many of the hardware functions to the compiler.<>
         
        
            Keywords : 
microprocessor chips; HPSm2; compiler; performance improvement; refined single-chip microengine; CMOS technology; Clocks; Computer science; Decoding; Hardware; Logic; Microarchitecture; Registers; VLIW; Very large scale integration;
         
        
        
        
            Conference_Titel : 
System Sciences, 1988. Vol.I. Architecture Track, Proceedings of the Twenty-First Annual Hawaii International Conference on
         
        
            Conference_Location : 
Kailua-Kona, HI, USA
         
        
            Print_ISBN : 
0-8186-0841-2
         
        
        
            DOI : 
10.1109/HICSS.1988.11740