• DocumentCode
    3099552
  • Title

    HPSm2: A refined single-chip microengine

  • Author

    Hwu, Wen-Mei W. ; Patt, Yale N.

  • Author_Institution
    Coord. Sci. Lab., Illinois Univ., Urbana, IL, USA
  • Volume
    1
  • fYear
    1988
  • fDate
    0-0 1988
  • Firstpage
    30
  • Lastpage
    40
  • Abstract
    The authors describe the high-performance single-chip microarchitecture of HPSm, which is being refined to provide a second chip, the HPSm2, with a 33% performance improvement. They relate how they are achieving this by making the HPS data path more regular and migrating many of the hardware functions to the compiler.<>
  • Keywords
    microprocessor chips; HPSm2; compiler; performance improvement; refined single-chip microengine; CMOS technology; Clocks; Computer science; Decoding; Hardware; Logic; Microarchitecture; Registers; VLIW; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System Sciences, 1988. Vol.I. Architecture Track, Proceedings of the Twenty-First Annual Hawaii International Conference on
  • Conference_Location
    Kailua-Kona, HI, USA
  • Print_ISBN
    0-8186-0841-2
  • Type

    conf

  • DOI
    10.1109/HICSS.1988.11740
  • Filename
    11740
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3099552