CMOS-integrated memristors for neuromorphic architectures

High-density memristor arrays are integrated on complementary metal-oxide-semiconductor (CMOS) substrates for neuromorphic circuit architectures. Advancing previously-reported work on Ag-filament memristor arrays [1], memristor operation is shown both in conjunction with CMOS multiplexer (MUX) circuits and in a “direct-access” configuration in which cross-bars are directly connected via CMOS interconnects to probe pads. The memristor arrays provide a high-density analog memory technology intended for CMOS-based neuromorphic architectures, Fig. 1 and [2]. Electrical data is shown for cross-bar arrays fabricated at 400-nm pitch with each memristor exhibiting intrinsic rectifying behavior, a beneficial feature for array operation. Forward-reverse-bias current ratios exceed 10³ at ±1.5 V. Devices are programmed to four distinct resistance states, demonstrating utility as an analog memory with an effective number of bits (ENOB) of 2. Devices are fabricated and characterized across a 2” 180-nm-node CMOS wafer. Fabrication results are shown for 100-nm-pitch cross-bar arrays which enable effective bit densities greater than 10¹⁰ bits/cm².