Title :
A X-band fully integrated CMOS frequency synthesizer
Author :
Jeng-Han Tsai ; Chia-Hsiang Chao ; Hung-Da Shih
Author_Institution :
Dept. of Appl. Electron. Technol., Nat. Taiwan Normal Univ., Taipei, Taiwan
Abstract :
A X-band frequency synthesizer with 2-bit control mode is implemented in standard 0.18-μm 1P6M CMOS process. A cascoded topology of voltage control oscillator (VCO) and first stage current mode logic (CML) divider is adopted for current reuse, low power, and robust tracking between VCO and the frequency divider. The measured in-band phase noise of the synthesizer is -75.06 dBc/Hz at a frequency offset of 100 kHz and out-of-band phase noise is -119.8 dBc/Hz at a frequency offset of 10 MHz. The total power consumption is 36.75 mW. The chip size is 0.745 × 0.76mm2.
Keywords :
CMOS integrated circuits; field effect MMIC; frequency dividers; frequency synthesizers; integrated circuit noise; low-power electronics; network topology; phase noise; voltage-controlled oscillators; 1P6M CMOS process; 2-bit control mode implementation; CML divider; VCO; X-band fully integrated CMOS frequency synthesizer; cascoded topology; current reuse; first stage current mode logic divider; frequency 8 GHz to 12 GHz; frequency divider; frequency offset; in-band phase noise; out-of-band phase noise; power 36.75 mW; robust tracking; size 0.18 mum; voltage-controlled oscillator; CMOS integrated circuits; Frequency conversion; Frequency measurement; Frequency synthesizers; Phase locked loops; Phase noise; Voltage-controlled oscillators; Frequency synthesizer; X-band; phase-locked loop (PLL); voltage-controlled oscillator (VCO);
Conference_Titel :
Microwave Conference Proceedings (APMC), 2012 Asia-Pacific
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4577-1330-9
Electronic_ISBN :
978-1-4577-1331-6
DOI :
10.1109/APMC.2012.6421877
