DocumentCode :
3101118
Title :
A new algorithm for circuit-level electrothermal simulation under EOS/ESD stress
Author :
Li, Tong ; Tsai, C.H. ; Huh, Y.J. ; Rosenbaum, E. ; Kang, S.M.
Author_Institution :
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
fYear :
1997
fDate :
13-16 Oct 1997
Firstpage :
130
Lastpage :
131
Abstract :
Summary form only given. ESD protection circuits are designed to meet certain specifications such as human body model (HBM) voltage. Electrothermal circuit simulation can be of use in protection circuit design. In this work, we propose a new algorithm to evaluate transient device temperatures, such as the drain junction temperature of NMOS devices, so that the electrothermal circuit simulation can be performed accurately. Using the electrothermal circuit simulator, we can examine device heating during HBM testing
Keywords :
MOS integrated circuits; circuit analysis computing; electrostatic discharge; heating; integrated circuit design; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; protection; thermal analysis; transient analysis; EOS; ESD protection circuits; ESD stress; HBM testing; HBM voltage specifications; NMOS devices; circuit-level electrothermal simulation algorithm; device heating; drain junction temperature; electrothermal circuit simulation; human body model; protection circuit design; transient device temperature; Biological system modeling; Circuit simulation; Circuit synthesis; Circuit testing; Electrostatic discharge; Electrothermal effects; Humans; Protection; Temperature; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Reliability Workshop Final Report, 1997 IEEE International
Conference_Location :
Lake Tahoe, CA
Print_ISBN :
0-7803-4205-4
Type :
conf
DOI :
10.1109/IRWS.1997.660305
Filename :
660305
Link To Document :
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