A scalar network analyzer based on detector-log amplifier RFIC chips

Author

Alam, Maqsud M. ; Smith, Charles E.

Author_Institution

Motorola Inc., Lauderdale, FL, USA

fYear

2001

fDate

2001

Firstpage

8

Lastpage

10

Abstract

The objective of this paper is to present the design, development, and implementation of a low-cost, compact, and moderately accurate Scalar Network Analyzer (SNA) using two radio frequency integrated circuit (RFIC) detector-logarithmic (or detector-log) and limiting IF (intermediate frequency) amplifier chips. The AD8309 is one such advanced detector-log and limiting amplifier RFIC chip that is used in this development. The primacy function of a scalar network analyzer is to take the ratio of the incident signal and the transmitted or reflected signal in order to determine the magnitude characteristics of various active and passive microwave devices. Using the detector-log RFIC chip makes it simple because it defects the envelope of the input RF (radio frequency) signal and converts it into a logarithmic dc (direct current) output voltage. This logarithmic transformation makes the ratio calculations much easier because the ratios become the difference of two log type voltages (log A/B=log A-log B). The proposed SNA has an operating frequency of 50 MHz to 520 MHz and has a dynamic range of greater than 50 dB

Keywords

microwave measurement; network analysers; radiofrequency amplifiers; 50 to 520 MHz; AD8309; detector-log amplifier RFIC chip; limiting IF amplifier; microwave device; scalar network analyzer; Band pass filters; Calibration; Envelope detectors; Frequency measurement; Measurement standards; RF signals; Radiofrequency integrated circuits; Semiconductor device measurement; System testing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SoutheastCon 2001. Proceedings. IEEE

Conference_Location

Clemson, SC

Print_ISBN

0-7803-6748-0

Type

conf

DOI

10.1109/SECON.2001.923078

Filename

923078