DocumentCode
3102770
Title
VLIW scheduling for energy and performance
Author
Parikh, A. ; Kandemir, M. ; Vijaykrishnan, N. ; Irwin, M.J.
Author_Institution
Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA
fYear
2001
fDate
37012
Firstpage
111
Lastpage
117
Abstract
We present and evaluate several instruction scheduling algorithms that reorder a given sequence of instructions taking into account the energy considerations. We first compare a performance oriented scheduling technique with three energy-oriented instruction scheduling algorithms from both performance (execution cycles of the resulting schedules) and energy consumption points of view. Then, we propose scheduling algorithms that consider energy and performance at the same time. The results obtained using randomly generated directed acyclic graphs show that these techniques are quite successful in reducing energy consumption and their performance (in terms of execution cycles) is comparable to that of a pure performance-oriented scheduling
Keywords
directed graphs; instruction sets; low-power electronics; microprocessor chips; processor scheduling; program compilers; VLIW scheduling; directed acyclic graphs; energy consumption consideration; execution cycles; instruction scheduling algorithms; low power design; performance consideration; randomly generated DAGs; Computer architecture; Computer science; Energy consumption; Operating systems; Optimizing compilers; Power engineering and energy; Processor scheduling; Scheduling algorithm; Software performance; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 2001. Proceedings. IEEE Computer Society Workshop on
Conference_Location
Orlando, FL
Print_ISBN
0-7695-1056-6
Type
conf
DOI
10.1109/IWV.2001.923148
Filename
923148
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