Title :
A low power SIMD architecture for affine-based texture mapping
Author_Institution :
Dept. of Electr. & Comput. Eng., Calgary Univ., Alta., Canada
Abstract :
This paper presents a novel low power SIMD architecture for texture mapping using transformation. Low power has been achieved by exploring the properties of the affine transformation to reduce the computational cost. The architecture has been prototyped using 0.35 μm CMOS technology with three layers of metal. The proposed architecture can be used in video object motion tracking and texture warping processors
Keywords :
CMOS digital integrated circuits; digital signal processing chips; image texture; low-power electronics; object recognition; parallel architectures; video signal processing; 0.35 micron; CMOS technology; affine-based texture mapping; computational cost; low power SIMD architecture; texture warping processors; video object motion tracking; CMOS technology; Computational efficiency; Computer architecture; Costs; Drives; Equations; Performance analysis; Prototypes; Technical Activities Guide -TAG; Topology;
Conference_Titel :
VLSI, 2001. Proceedings. IEEE Computer Society Workshop on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7695-1056-6
DOI :
10.1109/IWV.2001.923151
