Title :
An analog 1:16 demultiplexer for time-interleaved A/D-converters with a sampling rate of up to 64 GS/s
Author :
Lang, Fengkai ; Gerigk, Janina ; Ferenci, Damir ; Grozing, M. ; Berroth, Manfred
Author_Institution :
Inst. of Electr. & Opt. Commun. Eng., Univ. of Stuttgart, Stuttgart, Germany
Abstract :
An analog current-based 1:16-demultiplexer with integrated sample-and-hold is presented. It is designed in a 28 nm CMOS technology and is the basis for a 16-fold time-interleaved ADC. It offers sampling rates up to 64 GS/s, while consuming only 0.9 W of power and 2.6 mm2 of chip area.
Keywords :
CMOS analogue integrated circuits; analogue-digital conversion; demultiplexing equipment; sample and hold circuits; 16-fold ADC; CMOS technology; analog current-based 1:16 demultiplexer; analog-digital conversion; integrated sample-and-hold; power 0.9 W; size 28 nm; time-interleaved A-D-converters; CMOS integrated circuits; Capacitors; Clocks; Jitter; Switches; Synchronization; Transistors; Analog integrated circuits; Analog-digital conversion; Demultiplexing; Signal sampling;
Conference_Titel :
Ph.D. Research in Microelectronics and Electronics (PRIME), 2013 9th Conference on
Conference_Location :
Villach
Print_ISBN :
978-1-4673-4580-4
DOI :
10.1109/PRIME.2013.6603150
