Title :
A new software architecture for the BIP/Myrinet firmware
Author :
Westrelin, Roland
Author_Institution :
RESAM Lab., Lyon I Univ., Villeurbanne, France
Abstract :
BIP (Prylli and Touranchean, 1998) is a low level communication layer for the Myrinet network which includes dedicated firmware. We identified several flaws in the design of this firmware and based on our experience decided to rethink it. Our goal is to better use the hardware resources and to ensure the best possible flows of data through the channel controlled by the firmware. This results in new architecture based on an event-driven heart, optimized pipelining of communications and the possibility to use hardware communication channels asynchronously. Experiments demonstrate the efficiency of the new design
Keywords :
firmware; pipeline processing; protocols; software architecture; workstation clusters; BIP; Myrinet; dataflows; experiments; firmware; hardware communication channels; low level communication layer; optimized pipelining; software architecture; Communication channels; Communication system control; Delay; Hardware; Heart; Laboratories; Microprogramming; Network interfaces; Pipeline processing; Software architecture;
Conference_Titel :
Cluster Computing and the Grid, 2001. Proceedings. First IEEE/ACM International Symposium on
Conference_Location :
Brisbane, Qld.
Print_ISBN :
0-7695-1010-8
DOI :
10.1109/CCGRID.2001.923197
