DocumentCode :
3105555
Title :
Design methodology for neural network simulation of sequential circuits using neural storage elements
Author :
Dagdee, N. ; Chaudhari, N.S.
Author_Institution :
Dept. of Comput. Eng., SGS Inst. of Technol. & Sci., Indore, India
fYear :
1999
fDate :
36373
Firstpage :
1171
Lastpage :
1176
Abstract :
Multilayer feedforward networks have been found suitable for applications in which they need to learn binary-to-binary mappings. We propose a design methodology to simulate sequential functions using neural networks. The combinational function is implemented by a perceptron network with single hidden layer trained using an ETL algorithm. Design of neural storage elements similar to flip-flops is also proposed, which are used as memory elements to store the internal states. Use of the ETL algorithm guarantees convergence for any binary-to-binary mapping, and generally leads to faster convergence than the backpropagation algorithm. The resulting network only consists of neural elements, with all the neurons having integer valued weights and activation thresholds making the network more suitable for hardware implementation using digital VLSI technology
Keywords :
associative processing; content-addressable storage; feedforward neural nets; sequential circuits; activation thresholds; combinational function; flip-flops; multilayer feedforward networks; neural network simulation; neural storage elements; sequential circuits; Backpropagation algorithms; Biological neural networks; Circuit simulation; Computational modeling; Design methodology; Flip-flops; Multi-layer neural network; Neural networks; Neurons; Sequential circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SICE Annual, 1999. 38th Annual Conference Proceedings of the
Conference_Location :
Morioka
Print_ISBN :
4-907764-13-8
Type :
conf
DOI :
10.1109/SICE.1999.788718
Filename :
788718
Link To Document :
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