Title :
Dynamic register promotion of stack variables
Author :
Li, Jianjun ; Chenggang Wu ; Hsu, Wei-Chung
Author_Institution :
Key Lab. of Comput. Syst. & Archit., Chinese Acad. of Sci., Beijing, China
Abstract :
Dynamic Binary Translation (DBT) has been widely used in various applications. Although new architectures and micro-architectures often create performance opportunities for programmers and compilers, such performance opportunities may not be exploited by legacy executables. For example, the additional general-purpose and XMM registers in the Intel64 architecture do not benefit the IA-32 binaries. In this paper, we designed and developed a DBT system to dynamically promote stack variables in the source binaries to the additional registers of the target architecture. One of the most challenging problems is how to deal with the possible but rare memory aliases between promoted stack variables and other implicit memory references. We devised a runtime alias detection approach based on the page protection mechanism in Linux and a novel stack switching method to catch memory aliases at run-time. This approach is much less expensive than traditional approaches like inserting address checking instructions. On an Intel64 platform, our DBT system with speculative stack variable promotion has sped up several SPEC CPU2006 benchmarks in IA-32 code, with the largest performance gain over 45%.
Keywords :
Linux; instruction sets; program compilers; virtual machines; DBT system; Intel64 architecture; Linux; XMM register; dynamic binary translation; dynamic register promotion; micro-architecture; page protection mechanism; stack variable; Benchmark testing; Computer architecture; Optimization; Program processors; Registers; Runtime; Switches;
Conference_Titel :
Code Generation and Optimization (CGO), 2011 9th Annual IEEE/ACM International Symposium on
Conference_Location :
Chamonix
Print_ISBN :
978-1-61284-356-8
Electronic_ISBN :
978-1-61284-358-2
DOI :
10.1109/CGO.2011.5764671