High performance SOI lateral trench dual gate power MOSFET

In this paper, a lateral trench dual gate metal-oxide-semiconductor (LTDGMOS), a power MOSFET on silicon-on-insulator (SOI) is presented. The proposed device is having a trench dual gate structure for parallel conduction of two channels. The trench structure along with p⁺ buried layer in drift region causes RESURF effect in the device. Two-dimensional numerical simulations have been performed to analyse and compare the performance of the proposed device with that of the conventional device. The proposed power MOSFET provides 2.5 times higher output current, 39% decrease in threshold voltage, 34% reduction in ON-resistance, 53% improvement in peak transconductance, 65% increase in breakdown voltage, 28% reduction in gate-drain charge density and 53% improvement in figure-of-merit over the conventional power MOSFET on SOI for the same cell pitch.